1. Field of the Invention
The present invention relates to an integrated circuit, and in particular, to an electrostatic discharge (ESD) protection device.
2. Description of Related Art
ESD is the main factor of electrical overstress (EOS) which causes damage to most of electronic devices or systems. Such damage can result in the permanent damage of semiconductor devices and computer systems, so that the circuit function of integrated circuits (ICs) is affected and the operation of electronic products is abnormal. Accordingly, a number of methods have been developed to protect semiconductor IC devices against possible ESD damages. The most common type of ESD protection is the incorporation of a specific hardware inside the IC package. A specially-designed ESD protection device set up between an input pad and an internal device is utmostly required, so as to protect the internal device.
The conventional complementary metal oxide semiconductor (CMOS) process involves gate-grounded NMOS (GGNMOS), silicon-controlled rectifier (SCR) or diode for the ESD protection. However, each of the forgoing devices cannot satisfy the requirements for high speed applications or for radio frequency (RF) applications.
The GGNMOS is usually designed in a larger scale due to disposition of a parasitic bipolar junction transistor (BJT), and has a higher equivalent capacitance CESD which causes function failure. As the circuits and the devices are continuously miniaturized along with the rapid progress in techniques of the semiconductor process, gate oxide of the GGNMOS could endure the high voltage of the ESD no longer. Although the SCR has a smaller equivalent capacitance CESD, it usually requires a higher trigger voltage. An additional trigger circuit is therefore demanded for the SCR, leading to a great increase in the utilized silicon area. The equivalent capacitance CESD of the diode is a bit larger than that of the SCR, yet the equivalent capacitance CESD of the diode is still restricted in the applications to GHz.